With the continuous advancement of integrated circuit technology, advanced manufacturing and packaging have greatly enhanced chip performance and integration density. However, large-scale structures, high-density interconnects, and multi-chip stacking also intensify reliability issues such as warpage, raising the risk of failure. To improve the stability and yield of semiconductor processes, accurate warpage measurement and analysis have become essential for process control. This paper provides a systematic review of the definition, measurement methods, and recent progress related to warpage in semiconductor packaging. The concept of warpage and the corresponding measurement standards are first clarified based on domestic and international specifications. Major measurement techniques—including contact methods, laser scanning, shadow moir, interferometry, fringe projection, and digital image correlation—are then introduced and compared in terms of their principles, advantages, and limitations. Literature statistics indicate that shadow moir is the most widely used method, while digital image correlation is rapidly growing due to its capability for strain and coefficient of thermal expansion measurement and strong scalability; fringe projection is also increasingly adopted for its high flexibility. Finally, this paper summarizes the current status of commercial warpage-measurement systems in terms of accuracy, field of view, and measurement principles, and outlines potential improvement directions for domestic instruments. This review aims to support the selection of warpage-measurement methods and the optimization of semiconductor processes, promoting the development of measurement technologies and the broader industry.