A Ref. ADC-based calibration for time interleaved ADCs using random sampling sequence
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TN432. 1

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    Abstract:

    A background calibration algorithm based on ref. ADC is proposed for the mismatch in time interleaved ADC (TIADC). The difference between the output of the ref. ADC and sub-ADC at the same sampling time was used to estimate the mismatch, then subtracts the mismatch from the system output to realize adaptive calibration. Furthermore, randomization technology is adopted to solve the problem of the interference between the ref. ADC and TI-ADC, coupled through the input network when there is no separate input buffer at the front end of TI-ADC system by reducing residual interleaving spurs. The proposed algorithm can achieve effective calibration of the three main mismatch errors at the same time, and there is no limitation on the input signal bandwidth. Applied to a 12-bit 1 GS / s TIADC, when the input signal frequency is 470 MHz, FPGA verification results show that after calibration, the spurious-free dynamic range (SFDR) increase by 44. 14 dB to 76. 16 dB.

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  • Received:
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  • Online: February 27,2023
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