Communications hardware, signal and image processing need a large number of mathematical operation, and coordinate rotation digital computer (CORDIC) algorithm can quickly calculate the triangle, the hyperbolic, the natural logarithm and the square root function on the hardware, what’ s more, IEEE 754 standard is the most commonly used floating point numbers, so proposes a processing coprocessor of floating point arithmetic. The high radix adaptive CORDIC (HCORDIC) algorithm has the advantage of fast convergence speed. By designing the floating-point multiplier and floating-point adder for this algorithm, the architecture of floating-point coprocessor is designed to calculate various trigonometric functions and transcendental functions. This architecture can achieve faster convergence while reducing output delay and keeping low error. The design has been synthesized on the field programmable logic gate array(FPGA),the results show that compared to Xilinx CORDIC IP and other CORDIC architectures, it performs better in terms of output delay, maximum operating frequency, critical path and calculation accuracy, etc. It can be widely used in many calculation scenes and has a strong engineering value.