Design of embedded memory dynamic fault diagnosis data compression
DOI:
Author:
Affiliation:

Clc Number:

TP333;TN402

Fund Project:

  • Article
  • |
  • Figures
  • |
  • Metrics
  • |
  • Reference
  • |
  • Related
  • |
  • Cited by
  • |
  • Materials
  • |
  • Comments
    Abstract:

    In the process of micro and nano scale, the probability of an open circuit fault in the embedded memory increased, which resulting in dynamic faults. When static faults and dynamic faults coexisted, the traditional pause-and-export design of built-in self-test designs could correctly output fault diagnosis data, but there was a problem of diagnostic data redundancy. Therefore, a built-in self-test design for dynamic fault diagnosis data compression was proposed. Under the premise that it was not affecting the integrity of the diagnostic data, the problem of redundancy of diagnostic data was solved by identifying the fault modes as line faults, column faults and unit faults, and compressing the diagnostic data. The simulation results show that the design can correctly compress the dynamic fault diagnosis data, greatly improve the output efficiency, reduce the output time, and the area overhead is small. The area overhead of the 8 K×16 memory is 3. 16%, and the diagnosis data compression ratio is 3. 96% under 20% row failure and 5% dynamic failure

    Reference
    Related
    Cited by
Get Citation
Share
Article Metrics
  • Abstract:
  • PDF:
  • HTML:
  • Cited by:
History
  • Received:
  • Revised:
  • Adopted:
  • Online: November 20,2023
  • Published: