As the scale of integrated circuits continues to increase and their test cost increases with test time, the optimization of the test terms is an important topic. The existence of nonlinear implicit dependencies among test parameters in analog integrated circuit testing makes it very difficult to directly reveal their interrelationships and perform test method optimization. In this paper, we propose a method to optimize the number of test parameters of analog integrated circuits based on the XGBoost decision tree model, which explores the mutual characterization ability among different test parameters and sequentially deletes the test parameters that can be well expressed in the test sequence to achieve the purpose of shortening the test time under the condition of ensuring a certain escape rate. The paper discusses three metrics to evaluate the inter-representation capability of test parameters, such as the number of faults, feature importance and SHAP value, and conducts experiments on two types of analog IC test datasets. The results show that the number of faults is an excellent evaluation metric that can achieve 25% test parameter optimization under the condition that the test escape rate does not exceed 20 PPM.