| 赵 创,张 为.基于 HCORDIC 的浮点运算协处理器的设计[J].电子测量与仪器学报,2020,34(11):58-65 |
| 基于 HCORDIC 的浮点运算协处理器的设计 |
| Design of floating pointarithmetic coprocessor based on HCORDIC |
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| DOI： |
| 中文关键词: IEEE 754 FPGA CORDIC HCORDIC 吠陀算法 协处理器 |
| 英文关键词:IEEE 754 FPGA CORDIC HCORDIC vedic algorithm coprocessor |
| 基金项目:光电信息控制和安全技术重点实验室项目(JCKY2019210C053)、国家重点研发计划(2016YFE0100400)资助项目 |
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| 摘要点击次数: 246 |
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| 中文摘要: |
| 通信硬件、信号和图像处理上需要进行大量数学运算,坐标旋转数字计算机(CORDIC)算法可以在硬件上快速计算三
角、双曲线、自然对数和平方根函数,IEEE 754 标准是目前最常用的浮点数标准,所以提出了一种处理浮点运算的协处理器。
高基数自适应性 CORDIC(HCORDIC)算法具有收敛速度快的优点,通过设计用于该算法的浮点乘法器和浮点加法器,进而设计
出计算多种三角函数和超越函数的浮点运算协处理器架构。 该架构可以实现更快的收敛,同时减少了输出延时并具有低误差
精度。 设计已在现场可编程逻辑门阵列(FPGA)上实现,结果表明,相比于 Xilinx CORDIC IP 和其他 CORDIC 架构,在输出延
迟、最大工作频率、关键路径和计算精度等方面有更好的表现,该设计可以应用于多种计算场景,具有较强的工程价值。 |
| 英文摘要: |
| Communications hardware, signal and image processing need a large number of mathematical operation, and coordinate
rotation digital computer (CORDIC) algorithm can quickly calculate the triangle, the hyperbolic, the natural logarithm and the square
root function on the hardware, what’ s more, IEEE 754 standard is the most commonly used floating point numbers, so proposes a
processing coprocessor of floating point arithmetic. The high radix adaptive CORDIC (HCORDIC) algorithm has the advantage of fast
convergence speed. By designing the floating-point multiplier and floating-point adder for this algorithm, the architecture of floating-point
coprocessor is designed to calculate various trigonometric functions and transcendental functions. This architecture can achieve faster
convergence while reducing output delay and keeping low error. The design has been synthesized on the field programmable logic gate
array(FPGA),the results show that compared to Xilinx CORDIC IP and other CORDIC architectures, it performs better in terms of
output delay, maximum operating frequency, critical path and calculation accuracy, etc. It can be widely used in many calculation
scenes and has a strong engineering value. |
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