黄 威,毛 开,赵子坤,朱秋明,赵新宇,谢 红.可扩展多输入多输出信道高效模拟器研制[J].电子测量与仪器学报,2020,34(9):1-8 |
可扩展多输入多输出信道高效模拟器研制 |
Flexible and efficient emulator for multiple-input multiple-output channels |
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DOI: |
中文关键词: MIMO 信道模型 可扩展架构 信道模拟器 FPGA CORDIC |
英文关键词:MIMO channel model flexible structure channel emulator FPGA CORDIC |
基金项目:国家重大科学仪器设备开发专项(61827801)、中央高校基本科研业务费专项(NS2020026)、航空科学基金(201901052001)、电子信息系统复杂电磁环境效应国家重点实验室基金(CEMEE2020Z0207B)资助项目 |
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中文摘要: |
针对现有信道模拟器通道规模受限、扩展性差等缺陷,设计实现了一种可扩展的多输入多输出(multiply-input multiplyoutput, MIMO)信道高效模拟器。 该模拟器采用改进的坐标旋转数字计算(coordinate rotation digital computer, CORDIC)算法,只
需较少硬件资源便可实现大规模多支路的随机信道衰落精确模拟。 基于 MIMO 信道离散化模型提出了一种可扩展的硬件模拟
架构,并结合现场可编程门阵列(field-programmable gate array, FPGA)的并行处理优势,进行硬件实现及实测验证。 针对 3GPP
标准扩展车载 A 信道模型(extended vehicular A model, EVA)静态场景和时变场景的实测结果表明,所研制的 MIMO 信道模拟
器输出时延功率谱和多普勒功率谱等统计特性均与理论值吻合,可用于无线通信设备的方案验证、算法优化和性能分析。 |
英文摘要: |
For the limitations of existing channel emulators on the channel numbers and scalability, a flexible emulator for multiple-input
multiple-output (MIMO) channel is designed and implemented. By adopting an improved coordinate rotation digital computer (CORDIC)
algorithm, the emulator can generate large number of accurate random channel fading in real-time, but consumes less hardware
resources. On this basis, a flexible hardware framework based on the MIMO discrete channel model is also developed. With the
advantages of field-programmable gate array ( FPGA) on parallel processing, the emulation framework is implemented on a FPGA
platform. Hardware measurements are conducted with the parameters of extended vehicular A model (EVA) in 3GPP standard. The test
results for both static and time-variant scenarios show that the output statistical properties of proposed emulator, i. e. , power delay
profiles (PDP) and Doppler power spectrum densities (DPSD) are consistent well with the theoretical ones. Thus, it can be applied on
the design verification, algorithm optimization, and performance evaluation of wireless communication devices. |
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